The MC54/74HC is identical in pinout to the LS .. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do. Product data sheet. Rev. 03 — 6 September 2 of Philips Semiconductors. 74HC; 74HCT Dual 4-bit binary ripple counter. 74HC datasheet, 74HC pdf, 74HC data sheet, datasheet, data sheet, pdf, Philips, Dual 4-bit binary ripple counter.

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Features and benefits 3. Each counter features a clock input ncpan overriding asynchronous master reset input nmr and 4 buffered parallel outputs nq0 to nq3. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V CC. Datasehet 4-bit binary counters with individual clocks Divide by any binary module up to 28 in one package Two master resets to clear each 4-bit counter individually Table 1.

Functional diagram Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Functional diagram Fig 4. State diagram Product data sheet Datashete. Logic diagram one counter 5. Pin configuration SO14 Product data sheet Rev. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical datashdet to solder this pad.

However, if it is soldered, the solder land should remain floating or be connected to V CC.

Functional description Table 3. Limiting values Table 4. P tot derates linearly with 5. P tot derates linearly with 4. Product data sheet Rev. Recommended operating conditions Table 5. Static characteristics Table 6. Dynamic characteristics Table 7.

Measurement points are given in Table 8. Propagation delays clock datasheet to output nqxthe output transition times and the maximum clock frequency Table 8.

Propagation delays clock ncp to output nqxpulse width master 74hc3393 nmrand recovery time master reset nmr to clock ncp Fig Test data is given in Table 9. Test circuit for measuring switching times Table 9. Package outline Fig Revision history Table The conditions for C PD have been corrected errata. The format of this data sheet has been redesigned to comply with the new eatasheet guidelines of NXP Semiconductors.

Legal texts have been adapted to the new company name where 74uc393. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. The content is still under internal review and subject to formal approval, which may result in modifications or additions.

NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall datadheet no liability for the consequences of use of such information. Short data sheet A short data sheet is an extract from a full data sheet with the same product type number s and title.

A short data sheet is intended for quick reference only and should not be relied upon to contain detailed datasueet full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with 744hc393 short data sheet, the full data sheet shall prevail.

Product specification The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly datashdet otherwise in writing.

In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet Disclaimers Limited warranty and liability Information in this document is believed to be accurate and reliable.


However, NXP Semiconductors does not give any representations or warranties, expressed or 74hc93, as to the accuracy or completeness of such information and shall datsheet no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages including – without limitation – lost profits, lost savings, business interruption, costs related to the removal or replacement of datazheet products or rework charges whether or not such damages are based on tort including negligencewarranty, breach of contract or any other 74hc339 theory.

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This document supersedes and replaces all 7hc393 supplied prior to the publication hereof. Suitability for use NXP Semiconductors products are not designed, authorized or warranted to be suitable for use 74hc339 life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage.

Applications Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any datxsheet with applications or customer product design.

It is customer s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer s applications and products planned, as well as for the planned application and use of customer s third party customer s. Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.

NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer s applications or products, or the application or use by customer s third party customer s.

Customer is responsible for doing all necessary testing for the customer s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer 7h4c393 third party customer s. NXP does not accept any liability in this respect. Limiting values Stress above one or more limiting values as defined in the Absolute Maximum Ratings System of IEC will cause permanent datashet to the device.

74HC; 74HCT Dual 4-bit binary ripple counter – PDF

Limiting values are stress ratings only and proper operation of the device at these or any other conditions above those given in the Recommended operating conditions section if present or the Characteristics sections of this document is not warranted.

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Contact information For more information, please visit: For sales office addresses, please send an to: Contents 1 General description Features and benefits Ordering information Functional diagram Pinning information Pinning Pin description Functional description Limiting values Recommended operating conditions Static characteristics Dynamic characteristics Waveforms Package outline Abbreviations Revision history Legal information Data sheet status Definitions Disclaimers Trademarks Contact information Contents Please be aware that important notices concerning this document and the product s described herein, have been included in section Legal information.

V All rights reserved. For more information, please visit: Features and benefits The is a quad 2-input NOR gate. This enables the use of current limiting resistors.

74HC393 Datasheet

Ordering information The are 8-bit multiplexer with eight binary inputs I0 to I7three select inputs S0. Ordering information The is a quad positive-edge triggered D-type flip-flop with individual data inputs Dn. Ordering information The is a dual 4-input NOR gate. Inputs also include clamp diodes that enable the use of current. Ordering information The is a with a clock input CPan overriding asynchronous master reset. Ordering information The is an octal positive-edge triggered D-type flip-flop.

The device features clock CP. Ordering information The decodes three binary weighted address inputs A0, A1 and A2 to eight mutually exclusive.

Ordering information The is a. It decodes four binary weighted address inputs A0 to A3 to sixteen mutually. Ordering information The is a dual negative edge triggered JK flip-flop featuring individual J and K inputs.

Ordering information The decodes two binary weighted address inputs na0, na1 to four mutually exclusive outputs. Ordering information The is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. General description The is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable LE and output enable OE inputs. General description The is a hex inverter with Schmitt-trigger inputs.

This device features datwsheet input threshold levels to allow interfacing to TTL logic. The outputs are fully buffered for the highest noise.

Ordering information The is a dual 4-bit internally synchronous binary counter. The counter has an active HIGH.